職位描述
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職責描述:
1.Develop SRAM/ROM compilers and customized macros.
2.Develop SRAM/ROM characterization flow and deliver design kits.
3.Develop Memory compiler tiling code.
任職要求:
1.Candidate must have a MS degree or above in Electrical or Computer Engineering
2.Knowledge on transistor level circuit design and layout design.
3.Experience in spice simulation or fast spice simulation.
4.Familiarity with Verilog and Synopsys .lib.
5.Ability in scripting language, such as Perl/Python/shell/tcl
截止日期:2024年08月18日
招聘人數(shù):2人
工作地點
地址:南京江寧區(qū)南京-江寧區(qū)九龍湖
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職位發(fā)布者
HR
臺積電(南京)有限公司
![](http://img.jrzp.com/jrzpfile/rcw/images/sfrz_yrz.png)
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電子技術·半導體·集成電路
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200-499人
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外商獨資·外企辦事處
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浦口經濟開發(fā)區(qū)紫峰路16號