職位描述
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崗位職責(zé):
1.Develop SRAM/ROM compilers and customized macros.
2.Develop SRAM/ROM characterization flow and deliver design kits.
3.Develop Memory compiler tiling code.
任職要求:
1.Candidate must have a MS degree or above in Electrical or Computer Engineering
2.Knowledge on transistor level circuit design and layout design.
3.Experience in spice simulation or fast spice simulation.
4.Familiarity with Verilog and Synopsys .lib.
5.Ability in scripting language, such as Perl/Python/shell/tcl
1.Develop SRAM/ROM compilers and customized macros.
2.Develop SRAM/ROM characterization flow and deliver design kits.
3.Develop Memory compiler tiling code.
任職要求:
1.Candidate must have a MS degree or above in Electrical or Computer Engineering
2.Knowledge on transistor level circuit design and layout design.
3.Experience in spice simulation or fast spice simulation.
4.Familiarity with Verilog and Synopsys .lib.
5.Ability in scripting language, such as Perl/Python/shell/tcl
工作地點(diǎn)
地址:漯河郾城區(qū)九龍湖國際企業(yè)總部
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職位發(fā)布者
HR
臺積電(南京)有限公司
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電子技術(shù)·半導(dǎo)體·集成電路
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200-499人
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外商獨(dú)資·外企辦事處
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浦口經(jīng)濟(jì)開發(fā)區(qū)紫峰路16號